1. Field of the Invention
present invention pertains to a method of etching a material within a recess (such as a trench or contact via). In particular, the present invention pertains to a method for detecting the approach of an endpoint during the etching of polysilicon within a recess. The method of the invention is particularly useful in the formation of metal gate structures.
2. Brief Description of the Background Art
The use of metal gates within semiconductor structures is a relatively new concept in the art of semiconductor manufacture. There are numerous difficulties inherent in the formation of a metal gate structure which have yet to be addressed. In forming a metal gate structure, a metal-containing gate layer is typically deposited over a thin gate dielectric layer, which overlies a semiconductor structure. As semiconductor manufacturing technology advances, gate dielectric layers are becoming thinner and thinner. For example, the current standard thickness for a silicon oxide gate dielectric layer is about 15 xc3x85 to about 30 xc3x85. When tantalum pentoxide is used, the thickness of the gate dielectric layer may be lower than when silicon oxide is used.
In the past, a metal gate has been formed by pattern etching a metal layer. Pattern etching of the metal gate layer must be carried out without etching through or otherwise damaging a very thin underlying dielectric layer. This requires an etch process which has a high selectivity for etching the metal layer relative to the underlying dielectric layer. Further, it has been important to have a very sensitive endpoint detection system that can determine when the etching process is approaching completion. The metal etch process can then be stopped before damage is done to the underlying dielectric layer.
A state of the art endpoint detection system is described in commonly owned U.S. Pat. No. 6,081,334, to Grimbergen et al. Grimbergen et al. provides detection of the endpoint during etching of a layer of material, deposition of a CVD layer, or deposition of a PVD layer, for example. The intensity of an incident light beam reflected from a layer on a substrate is measured over time, to determine a measured waveform pattern. The measured waveform pattern is compared to a predetermined characteristic waveform pattern, and when the two waveform patterns are similar or substantially the same, the process conditions are changed to change a process variable before the entire layer is completely processed (Abstract). The thin film interferometry endpoint detection technique described by Grimbergen et al. provides a very clear (inflection) endpoint.
Unfortunately, it is difficult to determine the endpoint for etching a metal layer relative to an underlying layer using the thin film interferometry endpoint detection technique disclosed by Grimbergen et al. Metals are reflective, rather than transparent, and the thin film interferometry technique relies on the reflectivity of the underlying layer relative to the overlying layer. If the overlying layer is highly reflective, the reflective component from an underlying layer may be masked, so that the technique does not work well.
The present process for forming a metal gate involves the replacement of a polysilicon fill layer formed in a trench with a metal layer. The sidewalls of the trench comprise a dielectric material (such as silicon oxide or silicon nitride) and the base of the trench is a thin gate dielectric layer, which overlies a semiconductor substrate (which is typically single-crystal silicon). The process requires complete removal of the polysilicon from the trench prior to deposition of the metal gate layer. Removal of the polysilicon from the trench requires recess etching of the polysilicon relative to the underlying gate dielectric layer. This method is used to avoid the need for etching a metal gate layer relative to an underlying thin gate dielectric layer.
Kaplita et al. (Electrochemical Society Proceedings, Vol. 99-30, pp. 213-219; Proceedings of the SPIE Conference on Process, Equipment, and Materials Control in Integrated Circuit Manufacturing V, Vol. 3882, pp. 90-97, 1999) have described the use of a multi-layer interferometry endpoint detection technique to signal the endpoint for recess etching of polysilicon within a shallow trench formed in a single-crystal silicon substrate, with no underlying gate dielectric layer. The technique was designed to signal the endpoint for recess etching of polysilicon in a trench having a depth of less than about 4000 xc3x85. It is desired to have the endpoint of the polysilicon etch process be signaled when less than about 500 xc3x85 of polysilicon remains within the trench. The multi-layer interferometry endpoint detection technique used by Kaplita et al. records the interference from two reflective surfaces to calculate depth and etch rate using a depth-specific algorithm. Representative endpoint traces obtained using the multi-layer interferometry endpoint detection technique are shown in FIGS. 5 and 6. As shown in FIGS. 5 and 6, the Kaplita et al. endpoint detection technique provides a sinusoidal wave pattern of decreasing amplitude. There is no single inflection point which indicates a distinct endpoint for polysilicon etching.
The thin film interferometry endpoint detection technique described by Grimbergen et al. in U.S. Pat. No. 6,081,334 has been used to signal the endpoint for etching back a layer of polysilicon relative to a thin, underlying silicon oxide layer, where both layers are on a flat surface (Col. 5, line 51, through Col. 8, line 35). When an incident light beam strikes a layer of polysilicon, a portion of the light beam is reflected off the top surface of the polysilicon, and the remaining portion of the light beam is absorbed into the polysilicon. When a polysilicon layer is very thick, the portion of the incident light beam that is absorbed by the polysilicon is attenuated through the thickness of the polysilicon. However, as polysilicon gets thinner (i.e., less than about 500 xc3x85 thick), it becomes more transparent. As the polysilicon layer becomes more transparent, the absorbed light is able to travel through the polysilicon and reflect off the top surface of an underlying reflective layer. The reflected light then travels back through the polysilicon layer to a detector above the polysilicon layer surface. The detector senses a change in the total amount of light reflected off the surface of the polysilicon, which indicates that the polysilicon etch is approaching completion, and the surface of the underlying reflective layer is approaching. FIG. 4 shows the waveform spectra of reflected light beams at different wavelengths during etching of a layer of polysilicon overlying a silicon oxide layer, where both layers are on a flat surface. Note the distinct inflection point recorded at 365 nm (curve 430) as the endpoint for etching the polysilicon layer draws near, and light has begun to reflect off the underlying silicon oxide layer.
Although the Grimbergen technique described above can provide a distinct endpoint for etching back a flat surface layer of polysilicon relative to an underlying dielectric layer, problems were anticipated in using this technique to detect the endpoint for recess etching of polysilicon within a trench. Because a large portion (generally in excess of 50%, and typically in excess of about 70%) of the substrate surface is covered by a dielectric material (typically silicon oxide), it was expected that the magnitude of the incident light reflecting off the dielectric substrate surface would obscure the relatively small change in the amount of reflected light associated with etching of the polysilicon in the polysilicon-filled trenches. This problem was anticipated to be especially significant in isolated feature areas of the substrate, where the number of polysilicon-filled trenches per unit area is small.
Due to the potential problems with use of the Grimbergen method to detect an endpoint for etching polysilicon in a trench, and due to the inability of the Kaplita et al. method to provide a distinct endpoint for etching polysilicon within a trench, we began work on an endpoint detection method which could be used to detect the endpoint for etching polysilicon in a recess.
We have discovered a method of detecting the approach of an endpoint during the etching of a material within a recess such as a trench or a contact via. The method provides a clear and distinct inflection endpoint signal, even for areas of a substrate containing isolated features. The method of etching the material in the recess employs thin film interferometric endpoint detection where the interferometric incident light beam wavelength is tailored to the material being etched; the spot size of the substrate illuminated by the light beam is sufficient to provide adequate signal intensity from the material being etched; and the refractive index of the material being etched is sufficiently different from the refractive index of other materials contributing to reflected light from the substrate surface that the combination of light beam wavelength, spot size and difference in refractive index provides a clear and distinct inflection end point signal.
In one embodiment of the invention, polysilicon is etched within a recess. According to this embodiment, a first polysilicon etch step is performed, using an aggressive etch chemistry and processing conditions, to rapidly remove a first portion of the polysilicon from the recess. An endpoint to the first polysilicon etch step is detected using a thin film interferometry endpoint detection technique, where the light beam wavelength ranges from about 350 nm to about 400 nm; the spot size diameter is larger than about 6 mm, and is typically about 8 mm to about 10 mm; and the difference in refractive index between the polysilicon and the material which makes up the majority of the substrate surface which is illuminated is about 1.0 or greater, and is typically about 1.4 or greater. This endpoint detection method may be used for etching of polysilicon within a recess, even when the feature sizes are as small as about 0.1 xcexc; the aspect ratio (ratio of the recess wall height to the recess feature size) is about 2; and the spacing between features is about 0.3 xcexc, by way of example and not by way of limitation.
Subsequent to the first polysilicon etch step, a less aggressive etch chemistry may be used in a timed etch process to remove the remaining polysilicon from the bottom of the recess, to expose an upper surface of a different material underlying the polysilicon. The second plasma source gas provides a selectivity (i.e., preference) for etching the polysilicon relative to the underlying material of at least 100:1. The etch chemistry and processing conditions used in the second, timed polysilicon etch step provide more controlled etching of the polysilicon layer and a greater selectivity for etching the polysilicon layer relative to the underlying material layer. When recess etching of polysilicon is performed according to the method, an upper surface of the underlying layer (typically a thin gate dielectric layer) is exposed, but not punched through.
The method of the invention is particularly useful for recess etching of polysilicon in the formation of a metal gate structure.